Hierarchical Strategy of Model Partitioning for VLSI-Design Using an Improved Mixture of Experts Approach

Authors: 
Hering, Klaus
Haupt, Reiner
Villmann, Thomas
Year: 
1996
Language: 
English
Abstract: 
The partitioning of complex processor models on the gate and register-transfer level for parallel functional simulation based on the clock-cycle algorithm is considered. We introduce a hierarchical partitioning scheme combining various partitioning algorithms in the frame of a competing strategy. Melting together difierent partitioning results within one level using superpositions we crossover to a mixture of experts one. This approach is improved applying genetic algorithms. In addition we present two new partitioning algorithms both of them taking cones as fundamental units for building partitions.
Appeared / Erschienen in: 
Proc. of 10th Workshop on Parallel and Distributed Simulation, IEEE Computer Society Press, Los Alamitos, 1996.
Pubdate / Erscheinungsdatum: 
1996
Pages / Seitenanzahl: 
9
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